Design Engineer, Tata Elxsi Limited, ITPB Road, Whitefield, Bangalore - 560048, Karnataka, India - Mail: mskumar@tataelxsi.co.in / mskumar86@myway.com - Ph: +91 9916516728
The Block diagram of Soild State Drive is shown below in diagram. The Explanation of work flow of each block has given under. Here the total work flow of the above block diagram discussed. Memory is one of the most crucial components of SSD along with the processor, the controller and the host. From the moment that it is switched on until it is shut down, the processor is continuously utilizing memory. It accesses memory in a particular order beginning with random access memory (RAM). That means that most data goes into RAM first, whether originating from flash memory or input.
When a system is turned on, the processor loads data from flash memory through flash control register and conducts a power-on self-test to ensure that all main components are functioning. The flash memory controller checks the memory chips for errors. Then from the main memory, the system loads the basic input/output operation that gives basic information about storage devices, boot sequence, security and configuration. The system then loads the operating system (OS) to the RAM

Opening an application will cause it to be loaded into RAM from the main flash memory. FIFO (First in First out) is used to align the processor request to the RAM. Any files that open in the current application will be placed into RAM as well. In fact, every time we open or load something, it goes into RAM. The processor gets the data it needs from RAM, processes it, and then sends new data back to RAM in a constant cycle.
This constant movement of data between CPU and RAM occurs millions of times per second. When we save a file, it is written to the flash memory. Then when we close the file or application, they are both removed from RAM. If we neglect to save modified files to a permanent storage device before closing them and thus purging them from RAM, the information will be lost.
ATA and Ultra DMA are used as interfaces between host and the memory. So all user inputs are accessed with these interfaces and it reaches the RAM through control dispatch, which is operated by the processor.
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